1. Field of the Invention
The present invention relates to a level-shift circuit using transistors. Further, the present invention relates to a driving method thereof.
2. Description of the Related Art
In recent years, development of a semiconductor integrated circuit such as an LSI where circuits having a plurality of functions such as a CPU (central processing unit) and a memory are incorporated in one chip has been promoted. Reduction in voltage of a power source of the integrated circuit has been demanded for a reduction in power consumption. When signals are transferred between circuits which have different power source voltages and functions, level conversion of the signals need to be performed.
As one method for the level conversion, a level-shift circuit is disclosed in Patent Document 1, in which a gate and a drain of an N-ch MOS transistor are together connected to a power source voltage VDD and a source of the N-ch MOS transistor is connected to a power-source-side circuit terminal of a CMOS inverter circuit. According to the description in Patent Document 1, the level-shift circuit is configured to control the threshold voltage of the N-ch MOS transistor by connecting a P-Well corresponding to a back-gate of the N-ch MOS transistor to GND to output an output pulse of the level shift circuit, whose “H” level is lower than the power source voltage VDD by a value close to the threshold voltage of the MOS transistor in its waveform.